| Author | Mani, N. |
| Call Number | AIT Diss. no.CS-91-2 |
| Subject(s) | Integrated circuits--Very large scale integration
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| Note | A dissertation submitted in partial fulfillment of the requirements for the degree of Doctor of Engineering |
| Publisher | Asian Institute of Technology |
| Abstract | A cooperative approach to computer aided VLSI design has been developed. The approach employs a set of cooperative knowledge sources involved in the design process at various stages of VLSI design, interacting through a common blackboard. In this work, we study the problem of designing VLSI circuits from the point of view of cooperation between distinct design knowledge SOurces. We look into the several possible models that describe cooperation between knowledge sources and ways in which the problem solving process and the knowledge sources could interact to fulfill the global design objectives. A strategy has been developed for effective cooperation and communication among the knowledge sources through the blackboard. The blackboard provides for structuring the design tasks and facilitates modular approach for the development of the knowledge sources. Based on this approach. a framework has been developed for the floor-plan aspect of the VLSI design. The knowledge sources are sets of procedures. These include network partitioning and slicing methods. This approach provides flexibility in Specifying the input description such as multi-terminal net representation, flexibility in terms of quick response and reducing the routing complexities. All the functional modules are assumed to be of rectangular type and each module is allowed to have a set of possible dimensions. A slicing tree representation is employed to represent the floor-plan and tree traversal operations are performed in order to obtain the final floor-plan design. The resulting floor-plan evaluation is based on the chip area and the estimated overall wire length. Provisions are made to include other parameters such as heating effects. electrical factors such as capacitance effeCts etc. without altering the framework. The prototype implementation of the approach provides an interactive environment for the designer to perform floor-planning. The performance of the approach is illustrated with examples. |
| Year | 1991 |
| Type | Dissertation |
| School | School of Engineering and Technology (SET) |
| Department | Department of Information and Communications Technologies (DICT) |
| Academic Program/FoS | Computer Science (CS) |
| Chairperson(s) | Sadananda, R. |
| Examination Committee(s) | H. N., Phien;Kanchit Malaivongs;Van Oudheusden, D. L. |
| Scholarship Donor(s) | Government of Australia |
| Degree | Thesis (Ph.D.) - Asian Institute of Technology, 1991 |