Card-based production control for repetitive manufacturing systems to reduce value added work in process | |
| Author | Aziz, Muhammad Haris |
| Call Number | AIT Diss. no.ISE-13-03 |
| Subject(s) | Production management Manufacturing processes Production control |
| Note | A dissertation submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy in Industrial and Manufacturing Engineering, School of Engineering and Technology |
| Publisher | Asian Institute of Technology |
| Series Statement | Dissertation ; no. ISE-13-03 |
| Abstract | For Repetitive Manufacturing Systems (RMS), a common simplifying assumption used in the literature is to minimize average Work In Process (WIP), while achieving maximum Production Rate (PR), which doesn’t consider the fact that the value of WIP increases down the stream of a production process as labor, time, energy and resources added to it. Moreover, average WIP minimization does not guarantee the minimization of WIP buildups at the bottleneck. This implies a performance measure; Cost of Value Added WIP (CVAW) which is the value of WIP or the cost associated with the value that is added during the commencement of a production process. A formulation for the computation of CVAW has been developed. Paired-cell Overlapping Loops with Card Authorization (POLCA) – originally developed for high variety, low volume production – has been applied to push RMS to reduce CVAW. Also, the use of bottleneck oriented Production Authorization Card (PAC) has been proposed to minimize CVAW. For this reason, generic black token closed loop Petri Net (PN) models of push RMS are developed for the PAC and for the POLCA. Tokens in the control loops of all these models represent card based signal for material flow control on the shop floor. Marking of these PNs is done through Mixed Integer Linear Programming (MILP) after computation of semi-positive P invariants. Then simulation is being done to obtain the queues of each part type waiting at each station, during variable demands. The values of queues serve as an input for the computation of CVAW.A PN marked graph has been used for the modeling due to its ability to model asynchronous, cyclic, live, discrete, and decision free system. Besides, PN is a graphical, mathematical as well as simulation tool, but computation of invariants for complex PNs limits its tractability and in turn applicability. Therefore, a heuristic has been proposed which marks the PN – without the need of computation of all the elementary circuits – on the basis of server circuits, part circuits and control circuits only. The effects of these PC systems have been investigated on different sizes of push RMS – ranging from 2 part types 3 stations to 10 part types 15 stations – against randomly generated variable demands. PAC and POLCA have also been compared with Kanban and with no card control. Results showed that the minimization of CVAW is better with PAC and POLCA than that of with Kanban and without any card control. On one hand, PAC has the advantage of simplicity and ease of implementation to push RMS over POLCA. On the other hand, the structure of the control loops of POLCA remains unchanged regardless of the bottleneck position, whereas, for PAC the structure of the control loop changes each time with the change in the bottleneck position. |
| Year | 2013 |
| Corresponding Series Added Entry | Asian Institute of Technology. Dissertation ; no. ISE-13-03 |
| Type | Dissertation |
| School | School of Engineering and Technology (SET) |
| Department | Department of Industrial Systems Engineering (DISE) |
| Academic Program/FoS | Industrial Systems Engineering (ISE) |
| Chairperson(s) | Bohez, Erik L. J.; |
| Examination Committee(s) | Manukid Parnichkun ;Dailey, Matthew N. ;Roongrat Pisuchpen; |
| Scholarship Donor(s) | Higher Education Commission (HEC) Pakistan ;Asian Institute of Technology Fellowship; |
| Degree | Thesis (Ph. D.) - Asian Institute of Technology, 2013 |