Wafer throughput improvement in soft bake process with hot plate method in photolithography by DOE technique | |
| Author | Arunee Suwanrat |
| Call Number | AIT Thesis no.ISE-13-41 |
| Subject(s) | Photolithography Photolithography--Experimentation |
| Note | A thesis submitted in partial fulfillment of the requirements for the degree of Master of Science in Microelectronic and Embedded System, School of Engineering and Technology |
| Publisher | Asian Institute of Technology |
| Series Statement | Thesis ; no. ISE-13-41 |
| Abstract | Wafer throughput is the key important thing in Hard Disk Drive manufacturing. One of the process that take long time from start until finish is Photolithography. More than half of cycle time in photolithography process comes from baking process. Oven baking method is used for cure the photoresist after spin coating. With baking temperature at 100 degree Celsius, Oven baking technique takes 90 minute to complete baking step. Also found the problem from uneven baking temperature and skin effect which impact to critical dimension of the pattern. The alternative baking technique, hot plate baking technique is introduced to shorten the baking time and prevent uneven baking temp, skin effect problem. But the baking process is directly impact to bubble defect. From previous data the immediately apply high temp can create more bubble defect. The step baking with hot plate technique was study by use DOE method to optimization. From the study can get the optimized parameter by use two steps baking which are 40 degree Celsius and 4 minutes at the first step and 96 degree Celsius and 3 minutes at the second step. These parameters not affect to bubble defect. The cycle time is reduced from 90 minutes per wafer to 7 minute per wafer, about 90 percent. |
| Year | 2013 |
| Corresponding Series Added Entry | Asian Institute of Technology. Thesis ; no. ISE-13-41 |
| Type | Thesis |
| School | School of Engineering and Technology (SET) |
| Department | Department of Industrial Systems Engineering (DISE) |
| Academic Program/FoS | Industrial Systems Engineering (ISE) |
| Chairperson(s) | Afzulpurkar, Nitin V. |
| Examination Committee(s) | Bohez, Erik L.J.;.Peerapol Boonyuen |
| Scholarship Donor(s) | Western Digital (Thailand) Co.,Ltd; Asian Institute of Technology Fellowship |
| Degree | Thesis (M.Eng.) - Asian Institute of Technology, 2013 |