| Author | Sarayut Amornwongpeeti |
| Call Number | AIT Thesis no.ME-10-01 |
| Subject(s) | Modulators (Electronics)
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| Note | A thesis submitted in partial fulfillment of the re quirements for the degree of Master of Engineering in Microelectronics, School of Engineering and Technology |
| Publisher | Asian Institute of Technology |
| Series Statement | Thesis ; no. ME-10-01 |
| Abstract | This thesis work presents a transistor-level topolo gy of a fourth-order cascaded multi-bit Delta-Sigma modulator with interstage fee dback paths in 3.3V single supply voltage, 0.35 μ m CMOS (C35B4) process. In addition, a comprehensiv e analysis in system- level using behavioral simulation models of a third -order Delta-Sigma modulator is performed to verify the concept of interstage feedb ack paths, which has been first proposed by Su and Chao. Because a cascaded multi-bit modula tor employs a multi-bit DAC in the loop, capacitor mismatch in a multi-bit DAC causes the DAC nonlinearity problem. An architecture that improves the performance deterior ation caused by the DAC nonlinearity in a cascaded multi-bit Delta-Sigma modulator is pr esented in both a transistor-level and a system-level. The modified architecture, with the e xtra feedback paths in each internal stage, can totally cancel the errors caused by the DAC nonlinearity, which deteriorate the performance of the modulator, at the final stage. M oreover, the modified architecture also increases one order of noise shaping function of DA C error with other internal stages when compared to a conventional cascaded (MASH) architec ture. Comparing results between the modified architecture and conventional MASH arc hitecture, improvement of the signal-to-noise (SNR) of the modified structure has been observed. |
| Year | 2010 |
| Corresponding Series Added Entry | Asian Institute of Technology. Thesis ; no. ME-10-01 |
| Type | Thesis |
| School | School of Engineering and Technology (SET) |
| Department | Department of Industrial Systems Engineering (DISE) |
| Academic Program/FoS | Microelectronics (ME) |
| Chairperson(s) | Mongkol Ekpanyapong |
| Examination Committee(s) | Afzulpurkar, Nitin V.;Apinunt Thanachayanont;Chumnarn Punyasai |
| Scholarship Donor(s) | RTG;TGI ST Fellowship |
| Degree | Thesis (M. Eng.) - Asian Institute of Technology, 2010 |