Design of a 20-GHz low noise amplifier in 0.18pm TSMC technologhy for automoive collision avoidance application | |
| Author | Thangarajah, Akilan |
| Call Number | AIT Thesis no.ISE-13-30 |
| Subject(s) | Amplifiers Automotive Noise |
| Note | The requirements for the degree of Master of Engineering in Microelectronics and Embedded Systems, School of Engineering and Technology |
| Publisher | Asian Institute of Technology |
| Series Statement | Thesis;no. ISE-13-30 |
| Abstract | In order to maintain a secure and comfortable driving environment there is raising demand on collision avoidance RADARs. It has enforced the research and development of such RADAR related modules notably the transceiver front - end. Moreover, the requirements of the transceiver front - ends are getting very high and stringent; for stance, low - power consumption, low noise figure, high gain, greater stability and lineari ty, reasonable figure of merit and so forth. The receiver's front - end is composed with the major modul es : Low Noise Amplifiers (LNA) , Mixers, and Voltage Controlled Oscillators . Among these modules, LNA the primary front - end is to enhance the weak signal received by the antenna. Although, design of an LNA could be relatively less complex than other RF components in the receiver chain, it is very critical as it must provide suffi cient gain to reduce the influence of receiver noise and its contribution of noise to the receding modules must be minimal. Hence, the performance trade - offs is a big challenge as it always involve with directly competing performance parameters: gain, nois e figure, power consumption, and stability. There are some design techniques and topologies proposed in previous literatures for high frequency, above 20 - GHz LNAs . However, on - chip fabrication of such high frequency LNA is still being challenging in the modern process technologies (0.18 m, 90nm and less) to meet the high - performance due to modeling issues, unpredictable parasitic parameters in the short - channel device and the high frequency effects. I n addition , as the integrated circuit (IC) fabrication technology continues scaling down, the supply voltage is getting reduced as well. Therefore , there are few drawbacks such as performance drop, non - linearity, increased noise level, lack of gain and bandwidth. Thus, this research focuses on 20 - GHz LNA des ign in 0.18 m TSMC technology to reach low NF, high gain, and low power consumption compare to the earlier similar wor ks in the sub - micron technology. The derivation of the noise and gain are presented . The design complies with Feriis equation which states that NF of the LNA does not dramatically increases over subsequent stages but the first stage. Thus, the design utilizes two - stage topology which includes three transistors. First - stage is a single ended common - source (CS) topology while the second stage is current reused topology. Hence, the design circuits all three transistors in CS configuration to get rid of excess gate noise imposed in common gate (CG) topology and employs only NMOS transistors to overcome the drawbacks of PMOS transistors such as bu lky size junctions, lower mobility and hence larger delays. As the result of these approaches, the design is able to meet the gain and NF requirements with low power dissipation. The Post layout simulations show that the LNA exhibits gain of 14.7dB, Noise figure of 3.4dB while it consumes only 10.62mW. The Chip area of the LNA is 0.5175mm 2 . This study also provides simulation proves for the robustness of the LNA by taking process variations, temperature variations, and supply voltage variations into account. |
| Year | 2013 |
| Corresponding Series Added Entry | Asian Institute of Technology. Thesis;no. ISE-13-30 |
| Type | Thesis |
| School | School of Engineering and Technology (SET) |
| Department | Department of Industrial Systems Engineering (DISE) |
| Academic Program/FoS | Industrial Systems Engineering (ISE) |
| Chairperson(s) | Mongkol Ekpanyapong |
| Examination Committee(s) | Bohez, Erik L.J.;Chumnarn Punyasai;Hsu, Heng-Ming |
| Scholarship Donor(s) | Thailand (HM King) |
| Degree | Thesis (M.Eng.) - Asian Institute of Technology, 2013 |