1 AIT Asian Institute of Technology

A parallel architecture for MPEG-2 video encoding

AuthorKronprom Thirawat
Call NumberAIT Thesis no. CS-00-37
Subject(s)Video compression

NoteA thesis submitted in partial fulfillment of the requirements for the degree of Master of Science, School of Advanced Technologies
PublisherAsian Institute of Technology
Series StatementThesis ; no. CS-00-37
AbstractMPEG-2 is an international standard for the compression of video signals. It is a lossy compression algorithm that reduces the number of bits required to digitally encode a video picture by removing visual redundancies and fine details not visible to the human eye. Compression ratios of 100: 1 are attainable through MPEG-2 compression. The MPEG-2 standard is distinguished from purely frame-based video compression algorithms by its exploitation of temporal locality in the video stream to create highly compressed intra-frames. The use of intra-frame compression allows MPEG-2 to achieve compression ratios at least lOX greater than either Motion JPEG or the DV standard used in today's camcorders. Many software base and hardware base have been proposed to increase speed up encoding time. In this study, we proposed the parallel architecture chip for encoding MPEG-2 video. The implementation has been simulated on Red Hat Linux release 6.2. Various numbers of frame and number of processor have been performed and evaluated. Experimental result in this study shows that using more processors does not always guarantee the best result. Appropriate number of processors should be selected.
Year2000
Corresponding Series Added EntryAsian Institute of Technology. Thesis ; no. CS-00-37
TypeThesis
SchoolSchool of Advanced Technologies (SAT)
DepartmentDepartment of Information and Communications Technologies (DICT)
Academic Program/FoSComputer Science (CS)
Chairperson(s)Qi, Yulu;
Examination Committee(s)Batanov, D. N;Aekavute Sujarae;
DegreeThesis (M.Sc.) - Asian Institute of Technology, 2000


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