| Author | Hu, Cheng-tsan |
| Call Number | AIT Thesis no.ISE-00-51 |
| Subject(s) | Power transmission--Computer programs
|
| Note | A thesis submitted in partial fulfillment of the requirements for the degree of Master of Engineering, School of Advanced Technologies |
| Publisher | Asian Institute of Technology |
| Series Statement | Thesis ; no. ISE-00-51 |
| Abstract | A three-phase static var generator (SVG) is proposed to compensate reactive power for improving power factor. An insulated gate bipolar transistor (IGBT) based voltage source inve1ter with pulse width modulation current controlled regulator is employed in SVG system. A Siemens S7-400 CPU 416-2 is used to implement the control algorithm of the SVG. A PI controller for the de voltage of capacitor is used to compute an active component of reference current in-phase with the supply voltage and maintain the de voltage at a constant value. The control algorithm of reference signal receives the voltage signal from three-phase power system to compute a reactive component of the reference current in quadrature with the supply voltage. Another Phase Lead control is used to compensate the attribution of time delay of hardware. A prototype of SVG using PWM current control between the reference current and sensed output current (feedback current) has been applied to generate the gating pulses of the IGBT module. This experiment only focuses on generating continuously reactive power using PWM current control and the output current of inverter provides nearly sinusoidal waveform current. This research will be used as a reference for unde1taking the second long-term research of a multilevel inverter which is applicable for distribution and transmission of power system. Anal~ical and experimental results are presented in detail to show the performance of the proposed SVG system. |
| Year | 2000 |
| Corresponding Series Added Entry | Asian Institute of Technology. Thesis ; no. ISE-00-51 |
| Type | Thesis |
| School | School of Advanced Technologies (SAT) |
| Department | Department of Industrial Systems Engineering (DISE) |
| Academic Program/FoS | Industrial Systems Engineering (ISE) |
| Chairperson(s) | Afzulpurkar, Nitin V.; |
| Examination Committee(s) | Athula Rajapakse;Manukid Parnichkun; |
| Scholarship Donor(s) | Chinese Taipei; |
| Degree | Thesis (M.Eng.) - Asian Institute of Technology, 2000 |