FEA modeling study on the reliability and performance of a flip-chip IC package | |
| Author | Zhang, Nina |
| Call Number | AIT Thesis no.ME-03-08 |
| Subject(s) | Electronic packaging Chip scale packaging |
| Note | A thesis submitted in partial fulfillment of requirements for the degree of Master of Engineering, School of Advanced Technologies |
| Publisher | Asian Institute of Technology |
| Series Statement | Thesis ; no. ME-03-08 |
| Abstract | Flip-chip IC package, a growing application of integrated circuit assemblies, is implemented by flipping over the silicon chip and putting it directly onto an organic substrate with underfill encapsulation applied between the chip and the printed circuit board (PCB). Due to the great mismatch in the coefficient of thermal expansion (CTE) between the silicon die and FR4-PCB substrate, this may lead to lower solder joint reliability and thus create a technical barrier in applying the flip-chip technology. In the flip-chip assembly process, underfill materials are applied to meet the reliability requirement for the product. This thesis presents an analysis on the mechanical and thermal reliability of a flip-chip with traditional underfill. The methodology adopted in this study is computer-modeling method. ANSYS finite element simulation software tool is used for the modeling. Mechanical analysis is based on three-point bending test. While a range of Young's modulus (E) values of underfill have been investigated. Graphical User Interface (GUI) method is chosen in this part for easily get familiar with ANSYS software. For thermal analysis, solder joint reliability and its fatigue lifetime was predicted based on Derveaux's theory. The effects of multiple CTE material configurations of underfill were studied. ANSYS APDL design language commands are included this part for the benefit of easily altering the parameter for study purpose. The modeling results have confirmed underfill material properties to be key parameter that affect flip-chip package reliability. |
| Year | 2003 |
| Corresponding Series Added Entry | Asian Institute of Technology. Thesis ; no. ME-03-08 |
| Type | Thesis |
| School | School of Advanced Technologies (SAT) |
| Department | Department of Industrial Systems Engineering (DISE) |
| Academic Program/FoS | Microelectronics (ME) |
| Chairperson(s) | Afzulpurkar, Nitin V.;Lertsak Lekawat; |
| Examination Committee(s) | Itti Rittaporn;Unakul, Apinetr;Cheng, Linda; |
| Scholarship Donor(s) | Asian Institute of Technology Partial Fellowship; |
| Degree | Thesis (M.Eng.) - Asian Institute of Technology, 2003 |