Noise reduction system for digital hearing aid | |
| Author | Wasit Limprasert |
| Call Number | AIT Thesis no.ME-07-06 |
| Subject(s) | Hearing aids--Noise Noise control |
| Note | A thesis submitted in partial fulfillment of the requirements for the degree of Master of Science in Microelectronics, School of Engineering and Technology |
| Publisher | Asian Institute of Technology |
| Series Statement | Thesis ; no. ME-07-06 |
| Abstract | One of the major problems for hearing aid users is surrounding noise. The thesis objective is to design noise reduction hardware (integrated circuit) for digital hearing aids. Instead of relying on separate algorithm and hardware (integrated circuit) developments, a design flow that integrates the developments of DSP algorithms and FPGA hardware to increase performance and reduce development time is illustrated. A noise reduction core using ADMA adaptive Beamformer is designed and tested as an example |
| Year | 2007 |
| Corresponding Series Added Entry | Asian Institute of Technology. Thesis ; no. ME-07-06 |
| Type | Thesis |
| School | School of Engineering and Technology (SET) |
| Department | Department of Industrial Systems Engineering (DISE) |
| Academic Program/FoS | Microelectronics (ME) |
| Chairperson(s) | Lertsak Lekawat;Afzulpurkar, Nitin V.; |
| Examination Committee(s) | Pasin Israsena; |
| Scholarship Donor(s) | Government of Thailand; |
| Degree | Thesis (M.Sc.) - Asian Institute of Technology, 2007 |