M²uP (multithreading microprocessor) datapath, ALU and hazard detection and handling unit development | |
| Author | Gomes, Tiago |
| Call Number | AIT Thesis no.ISE-11-22 |
| Subject(s) | Computer arithmetic and logic units Embedded computer systems |
| Note | A thesis submitted in partial fulfillment of the requirement for the degree of Master Engineering in Microelectronics and Embedded Systems, School of Engineering and Technology |
| Publisher | Asian Institute of Technology |
| Series Statement | Thesis ;no. ISE-11-22 |
| Abstract | This work presents the implementation of the Datapath, Arithmetic and Logic Unit (ALU) and Hazard Detection and Handling Unit for a three stages pipelined microprocessor with multi-thread support. The ALU is responsible for perform all the arithmetic and logic operations as well as the memory addresses calculations. Depending on the application target, the ALU structure can be configured by pre-processor directives to be tree or chain structured providing high performance or low power consumption implementations. The Hazard Unit implements a simplified scoreboard algorithm in order to reduce pipeline stalls caused by memory accesses and increase the processor performance. |
| Year | 2011 |
| Corresponding Series Added Entry | Asian Institute of Technology. Thesis ; no. ISE-11-22 |
| Type | Thesis |
| School | School of Engineering and Technology (SET) |
| Department | Department of Industrial Systems Engineering (DISE) |
| Academic Program/FoS | Industrial Systems Engineering (ISE) |
| Chairperson(s) | Mongkol Ekpanyapong.; |
| Examination Committee(s) | Tavares, Adriano;Dailey, Matthew N.;Chumnarn Punyasai; |
| Scholarship Donor(s) | EM EuroAsia Scholarship Program;Asian Institute of Technology; |
| Degree | Thesis (M. Eng.) - Asian Institute of Technology, 2011 |