Pulse shaping for software-defined communications using FPGAs | |
| Author | Swan Aung |
| Call Number | AIT Caps. Proj. no.EL-16-01 |
| Subject(s) | Software-defined networking (Computer network technology) Field programmable gate arrays |
| Note | A capstone project submitted in partial fulfillment of the requirements for the degree of Bachelor of Science in Engineering Electronics Engineering, School of Engineering and Technology |
| Publisher | Asian Institute of Technology |
| Series Statement | Caps. Proj. ; no. EL-16-01 |
| Abstract | In this project, pulse amplitude modulation (PAM) is implemented for data transmissions. MATLAB program and hardware programming language called Verilog are used to implement rectangular and square-root raised cosine pulse shaping filters on field programmable gate arrays (FPGAs). The corresponding matched filtering is also implemented at the receiver. For both pulse shapes, data transmissions are successfully demonstrated. Since the communication system is software-defined, changing the pulse shape does not require any modification of the hardware. |
| Year | 2016 |
| Corresponding Series Added Entry | Asian Institute of Technology. Caps. Proj. ; no. EL-16-01 |
| Type | Capstone Project |
| School | School of Engineering and Technology (SET) |
| Department | Bachelor Degree |
| Academic Program/FoS | Electronic Engineering (EL) |
| Chairperson(s) | Poompat Saengudomlert;Mongkol Ekpanyapong; |
| Examination Committee(s) | Attaphongse Taparugssanagorn; |
| Degree | Capstone Project (B.Sc.)-Asian Institute of Technology, 2016 |