| Author | Patcharin Usawakhajornsak |
| Call Number | AIT Thesis no. CS-95-01 |
| Subject(s) | Computer architecture
|
| Note | A thesis submitted in partial fulfillment of the requirements for the degree of Master of
Science |
| Publisher | Asian Institute of Technology |
| Abstract | The elementary building block of any computer is its instruction set. In designing a
more effective instruction set for high speed computer architecture, careful analyses the
usage of existing computer instruction set is one of the most critical tasks. Typically, a
method that is used by many is called software tracing method.
In this study, the Instruction Mix Rate produced by SpixTools helps the designer
to determine the effectiveness of each instruction by profiling instruction frequency.
Whereas, the Relation Between Instructions is discovered by using Shade. The results
reveal that new instructions such as Three-Operands-adder and MULTIPLY combined
with ADD instruction can significantly improve CPU clock cycle by reducing the average
number of clock cycle per instruction. Furthermore, reducing the amount of registers,
which in turn reduces the chip size, can also help speed up the CPU. |
| Year | 1995 |
| Type | Thesis |
| School | School of Engineering and Technology (SET) |
| Department | Department of Information and Communications Technologies (DICT) |
| Academic Program/FoS | Computer Science (CS) |
| Chairperson(s) | Yulu, Qi; |
| Examination Committee(s) | Sadananda, Ramakoti;Batanov, Dentcho N.; |
| Scholarship Donor(s) | PTT-Petroleum Authority of Thailand; |
| Degree | Thesis (M.Sc.) - Asian Institute of Technology, 1995 |