| Author | Akarach Rujiranon |
| Call Number | AIT Thesis no.CS-95-18 |
| Subject(s) | Logic design
|
| Note | A thesis submitted m partial fulfillment of the requirement for the degree of Master of
Engineering |
| Publisher | Asian Institute of Technology |
| Abstract | Logic design consists of three main tasks: conceptualization and modeling, synthesis and optimization, and analysis and validation. Automated design has been developed to assist the engineers in reduction of design time and errors. Computer Aided Design (CAD) for sequential logic circuit deals with the dynamic behavior of the circuit, the design automation and the hierarchical circuit structure. A new sequential logic circuit data model based on temporal deductive object-orientation is proposed to meet these three requirements of CAD. Based on the proposed framework, the automatic circuit analysis and synthesis follow the theorem-proving approach which offers the benefit in the soundness of methodology. In order to yield the optimal circuit, the transformation rules are applied in the circuit optimization. They provide the advantage in that the improvement in quality of optimization can be easily attained by the addition of the new rules. Along with the transformation rules, the control mechanism in the application of such rules is also proposed to enhance the quality and efficiency of optimization. In order to verify and demonstrate the effectiveness of the proposed framework, the sequential logic design language and system have been implemented using the LIFE programming language. |
| Year | 1995 |
| Type | Thesis |
| School | School of Engineering and Technology (SET) |
| Department | Department of Information and Communications Technologies (DICT) |
| Academic Program/FoS | Computer Science (CS) |
| Chairperson(s) | Vilas Wuwongse; |
| Examination Committee(s) | Batanov, Dentcho N.;Yulu, Qi; |
| Scholarship Donor(s) | Telephone Organization of Thailand; |
| Degree | Thesis (M.Eng.) - Asian Institute of Technology, 1995 |