| Author | Vijayarangam, S. |
| Call Number | AIT Thesis no. TC-94-11 |
| Subject(s) | Telecommunication systems
|
| Note | A thesis submitted in partial fulfillment of the reqt1irement for the degree of Master
of Engineering, School of Engineering and Technology |
| Publisher | Asian Institute of Technology |
| Abstract | Current CCIIT recommendations do not suggest error correction schemes for
SDH based systems, and the recovery of bit errors inclucling error bursts and short
interruptions are entrusted to higher layer functions which the customers handle. Hence, if
it is possible to correct bit errors not only in the overheads for network management, but
also in the customer information field called the payload of a SDH frame, it will satisfy the
customer need for reliable high speed data transfer, including in the transport of A TM
cells over SDH. This research study proposes a new error correction scheme which can
correct bit errors in the whole of SDH frame, using the Product Codes and the CRC,
maintaining the cunent SDH frame format. The .effect of the error correction schemes
over multiple layers of SDH is also analyzed. The simulated results of the schemes show
the effectiveness for error correction to both random and bursty bit errors, the existence of
an optimum matrix format, and the possibility of a virtually error free .SDH based
connection. |
| Year | 1994 |
| Type | Thesis |
| School | School of Engineering and Technology (SET) |
| Department | Other Field of Studies (No Department) |
| Academic Program/FoS | Telecommunications (TC) |
| Chairperson(s) | Takahashi, Kiyoshi |
| Examination Committee(s) | Sharma, A.B. ;Ahmed, Kazi Mohiuddin ;O'Farrell, Timothy
|
| Scholarship Donor(s) | Finnish International Development Agency
(FINN ID A); |
| Degree | Thesis (M.Eng.) - Asian Institute of Technology, 1994 |