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Markovian-process based error-performance analysis of mixed SDH and PDH demultiplexers | |
Author | Tamrakar, Yogendra Man |
Call Number | AIT Thesis no. TC-93-7 |
Subject(s) | Digital communications |
Note | A thesis submitted in partial fulfillment of the requirement for the degree of Master of Engineering, School of Engineering and Technology |
Publisher | Asian Institute of Technology |
Abstract | Modern digital telecommunication systems all use time division multiplex technique with several levels in the multiplexed hierarchy. Digital networks are susceptible to error burst from various sources. The propagation of error burst in a digital hierarchy is caused by uncontrolled bit slip and/or loss of frame synchronization, induced by error burst at higher stage demultiplexers in the hierarchy. In this thesis work, analysis and estimation of extended error at each stage in the digital hierarchy ranging from STM-1 level in SDH to 2 Mbit/s in PDH, is presented. The idea of using Markovian model to analyze error propagation in a digital hierarchy is also presented. |
Year | 1993 |
Type | Thesis |
School | School of Engineering and Technology (SET) |
Department | Other Field of Studies (No Department) |
Academic Program/FoS | Telecommunications (TC) |
Chairperson(s) | Takahashi, Kenzo |
Examination Committee(s) | O'Farrell, Timothy ;Erke, Tapio J. |
Scholarship Donor(s) | Finnish International Development Agency (FINNIDA), Finland; |
Degree | Thesis (M.Eng.) - Asian Institute of Technology, 1993 |