DC-balanced improvement of interlaken protocol | |
| Author | Sarat Yoowattana |
| Call Number | AIT Diss. no.ISE-21-02 |
| Subject(s) | Data communications Computer network protocols |
| Note | A dissertation submitted in partial fulfillment of the requirements for the degree of Doctor of Engineering in Mechatronics and Embedded Systems, School of Engineering and Technology |
| Publisher | Asian Institute of Technology |
| Series Statement | Dissertation ; no. ISE-21-02 |
| Abstract | High-speed serial data communication is essential for connecting peripherals in high performance computing systems. The Interlaken is a . gh-speed serial data communication protocol that has been widely adopted in various applications because it can run on multiple medias such as PCBs, backplanes or over cables. The Interlaken uses 64b/67b line coding to maintain the run length (RL) and the running disparity (RD) with the advantage of an inversion bit that indicates whether the receiver must flip the data or not. By using the inversion bit, it increases 1 bit overhead to every data word. This thesis proposes 64b/i67b line coding for encoding and decoding, which is a new technique to improve the cumulative running disparity of 64b/67b without additional bit overhead. The results have been obtained from simulations that use random data and the Squash data set, and the proposed method reduces the maximum cumulative running disparity value up to 33% |
| Year | 2021 |
| Corresponding Series Added Entry | Asian Institute of Technology. Dissertation ; no. ISE-21-02 |
| Type | Dissertation |
| School | School of Engineering and Technology (SET) |
| Department | Department of Industrial Systems Engineering (DISE) |
| Academic Program/FoS | Industrial Systems Engineering (ISE) |
| Chairperson(s) | Mongkol Ekpanyapong; |
| Examination Committee(s) | Dailey, Matthew N.;Chumnan Panyasai; |
| Scholarship Donor(s) | Royal Thai Government Fellowship; |
| Degree | Thesis (Ph. D.) - Asian Institute of Technology, 2021 |