| Author | Aravindan, Chandrabose |
| Call Number | AIT Thesis no.CS-90-23 |
| Subject(s) | Logic programming
|
| Note | A thesis submitted in partial fulfillment of the requirements for the degree of Master of Engineering, School of Engineering and Technology
|
| Publisher | Asian Institute of Technology |
| Abstract | In this t hesis, a technique for unfolding negative literals, irrespective
of whether they are ground or not, during partial evaluation is proposed and
shown to be sound and complete wrt well-founded model semantics. |
| Year | 1990 |
| Type | Thesis |
| School | School of Engineering and Technology (SET) |
| Department | Other Field of Studies (No Department) |
| Academic Program/FoS | Computer Science (CS) |
| Chairperson(s) | Phan Minh Dung
|
| Examination Committee(s) | Huynh Ngoc Phien ;Vilas Wuwongse |
| Scholarship Donor(s) | Government of Japan |
| Degree | Thesis (M.Eng.) Asian Institute of Technology, 1990 |