Investigating the feasibility and effectiveness of a hybrid BCI speller using a consumer grade EEG headset | |
| Author | Kasajoo, Sunsun |
| Call Number | AIT Thesis no.CS-23-06 |
| Subject(s) | Electroencephalography Brain-computer interfaces |
| Note | A thesis submitted in partial fulfillment of the requirements for the degree of Master of Engineering in Computer Science |
| Publisher | Asian Institute of Technology |
| Abstract | Several paradigms have been utilized to create Brain Computer Interface (BCI) Spellers to assist individuals with neurological disorders in communicating. The current state of the art employs a hybrid technique that combines the Steady State Visually Evoked Potential (SSVEP) and P300 paradigms with the ensemble Task Related Component Analysis (TRCA) decoding algorithm. Existing research on hybrid spellers, however, relies heavily on expensive clinical-grade EEG devices (e.g., 64 channels, >1000Hz sampling rate), limiting their applicability in the real world. This paper investigates the viability and efficacy of a hybrid speller utilizing a consumer-grade EEG device (e.g., 8 channel EEG, 250Hz sampling rate). The first study conducts engineering experiments, examining the internal parameters of the hybrid speller. The second study conducts user experiments, examining the model’s long-term viability, i.e., whether it can still function after several days. In conclusion, although consumer-grade EEG is feasible, it has certain limitations, namely the number of targets (i.e., clinical grade can serve up to >100 tar gets, but we have trouble moving above 16 targets while maintaining at least 70% average accuracy) and speed (i.e., clinical grade requires less than 1s of stimulus duration, but we require at least 2s, likely due to the lower sampling rate). The results of this study will provide a practical foundation for practitioners and engineers to build upon on construct ing a cost-effective, practical BCI speller. The outcomes of our investigation, including the results, data, and code are available in https://github.com/sunsun101/hybrid-ssvep p300-speller. |
| Year | 2023 |
| Type | Thesis |
| School | School of Engineering and Technology |
| Department | Department of Information and Communications Technologies (DICT) |
| Academic Program/FoS | Computer Science (CS) |
| Chairperson(s) | Chaklam Silpasuwanchai |
| Examination Committee(s) | Dailey, Matthew N.;Mongkol Ekpanyapong |
| Scholarship Donor(s) | AIT Scholarships |
| Degree | Thesis (M. Eng.) - Asian Institute of Technology, 2023 |